M88DDR4DB01 is a dual 4-bit bidirectional data buffer with differential strobes designed for 1.2V VDD operation. The device has a dual 4-bit host bus interface that is connected to a memory controller and a dual 4-bit DRAM interface that is connected to two x4 DRAMs. It also has an input-only control bus interface that is connected to a DDR4 register buffer. This interface consists of a 4-bit control bus, two dedicated control signals, a voltage reference input and a differential clock input.
All DQ inputs are pseudo-differential with an internal voltage reference. All DQ outputs are VDD terminated drivers optimized to drive single or dual terminated traces in DDR4 LRDIMM applications. The differential DQS strobes are used to sample the DQ inputs and are regenerated internally for driving out the DQ outputs on the opposite side of the device.
The control inputs BCOM[3:0], BCKE and BODT are sampled by the clock inputs BCK_t and BCK_c. M88DDR4DB01 also supports dedicated pins for ZQ calibration and for parity and sequence error alerts.