M88MB6000 is a Load Reduced DIMM (LRDIMM) Memory Buffer (MB) that supports DDR3 SDRAM main memory. The MB allows buffering of memory traffic to support large memory capacities. Unlike DDR3 Register Buffer (SSTE32882), which only buffers Command, Address, Control and Clock, the MB also buffers the Data (DQ) interface between the Memory Controller and the DRAM components, and has extra features such as ODT processing, rank multiplication, address mirroring, control registers accessible over SMBus, and advanced test and calibration capabilities, etc. As the data electrical load is reduced for the Memory Controller interface, the system can now support more DIMMs per channel at a faster speed and higher density. All memory control for the DRAM resides in the host including memory request initiation, timing, scrubbing, sparing, and power management. The MB interface is responsible for memory requests to and from the local DIMM.
LRDIMM provides a high memory bandwidth, large capacity channel solution for DDR3 main memory systems. LRDIMM uses commodity DRAMs isolated from the channel behind the MB on the DIMM. The supported capacity exceeds 144 devices per channel (depending on channel and individual system design) and total memory capacity scales with DRAM bit density.