Development of next generation solutions for advanced memory interfaces of data centers;
High speed SI simulation and analysis;
Extraction of channel model using standard industry tools;
Lab measurements of interconnect channel in frequency and time domains.
MS in Electrical Engineering/Microwave/Physics/Computer Science/Math;
Knowledge of Electromagnetic and Microwave concepts;
Knowledge of a programming or scripting language in a Windows/UNIX environment;
Strong analytical and problem-solving skills;
Passion for technology;
Eager, quick learner with strong team-work spirit;
Excellent technical communication skills.
Perform RTL to GDSII design flow, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, EM/IR, etc.;
Perform full chip DRC/LVS/ANT/DFM;
Automate the design flow to promote efficiency and improve RTL to GDS design flow;
Participate in next generation physical design, methodology and flow development.
BSEE with minimum 1 year of P&R experience in using ICC2 or Innovus;
Successful track records of taping out 28/16nm chips;
Familiar with DC, PT, FM, DFT is preferred;
Familiar with RTL to GDSII design flow;
Familiar with computer languages such as C, C++, Perl/Skill/TCL/C-shell;
Self-motivated with good communication skills and team spirit.
Support RD Linux/UNIX network/OS/hardware;
Provide Perl/SKILLl/TCL script support and develop necessary scripts or tools for IC designers;
Support EDA tool and EDA design flow, especially digital front end flow (DC/PT/FM/DFT/Incisive/VCS/Conformal/Tessent etc);
Support timing characterization flow for stand cell/IO/memory/analog IP;
BSEE or MSEE with minimum 1 year of experience;
Familiar with EDA design flow for mixed-signal design;
Familiar with UNIX/Linux Operating system, VNC, Exceed;
Familiar with Computer languages such as C, C++, Perl/TCL/C-shell;
Familiar with version control tools like DesignSync, CVS, SVN, etc.;
LSF or SGE experience is a plus;
Good communication skills.
Linux kernel & driver development.
Master or bachelor degree of computer science or electronics;
Proficient in Linux kernel knowledge, familiar with Linux kernel source code, especially in memory management is a plus;
Experience in modifying and developing Linux kernel code is a plus;
Experience in Linux driver or windows driver is a plus;
Familiar with C language and script language such as Python/Perl is a plus;
Knowledge of DDR, Memory Controller, x86 System, I2C/SPI protocol, etc.;
Good English writing and reading skills;
Good communication skill, team work spirit, self-motivated
Experience as AE in IC Design Company is a plus.
Design, develop, and debug UEFI BIOS or Firmware for server platforms.
BSCS/BSEE with minimum 5 years of experience or MSCS/MSEE with 3+ years of experience in BIOS, firmware, or system software development;
Strong knowledge in X86 CPU memory ACPI, USB, PCIE, SATA SMBus and other PC industry standards;
Good at X86 assembly and C language;
Familiar with BIOS code base (INSYDE,AMI,PHOENIX,INTEL,etc. );
UEFI experience is required;
Experience in BIOS related debug tools is a plus (INTEL ITP, BIOS Vendor's debug tools);
Experience in LINUX or windows driver development is a plus;
Strong communication skills.
Support China customers with design-in of Montage DTV SoC products;
Assist the Sales team in managing account relationship;
Understand and solve customer specific problems;
Conduct technical training and interface with engineering and product development teams.
Bachelor or Master degree in Electronics Engineering, majoring in communication is preferred;
Good knowledge of DTV technology, preferably having STB/DTV SoC system design experience;
5+ years of experience in consumer electronics;
Able to expertly understand circuit design, circuit layout and components behavior;
Preferably be able to understand driver level C-programming;
Good communication and interpersonal skills in both Chinese and English;
Self-motivated and able to work independently as well as with a team and/or customers;
Good communication skill in both Chinese and English;
Business trip is required.
Play a critical role in meeting corporate goals with your experience to develop ATE test hardware & software to support IC design center;
Develop/convert/migrate hardware & software between test systems to increase test coverage and production throughput;
Enhance the existing test techniques for maximum test quality to minimize customer returns and to reduce test time;
Customize existing test hardware to PCBs for test repeatability, cost effectiveness, maintenance and productive debugging;
Procure essential instruments to continuously upgrade test engineering lab for bench-to-tester correlation;
Develop software tools to reduce test program development cycle time by automating generation of test programs from libraries of proven test methods;
Setup/transfer new products and technology for production off-load at off-shore.
Knowledge of ATE testing is essential;
Working experience in fast pace semi-conductor manufacturing environment;
Good sense of responsibility and positive working attitude;
Willing to travel at short notice;
BSEE/MSEE in Electronics/Electrical Engineering;
Experience in Mixed Signals and RF testing is preferred;
Good written and oral communication skills;
Knowledgeable of Teradyne J750 Catalyst or Advantest 93K ATE systems;
Able to understand, debug, modify and improve test programs;
Able to manage sub-contractors at different locations;
Circuit Design (IC) background will be taken as an additional qualification.
Module and System level architecture definition and design;
Module and System level RTL implementation;
Simulation/Verification at both module and system level;
Module-level synthesis and timing analysis;
Writing design spec and report;
FPGA/silicon debug on related modules.
Bachelor degree or Master degree in ASIC design relevant;
Minimum 3 years of SoC design experience;
Solid knowledge in digital IC design;
Strong skills of Verilog RTL coding and simulation;
Hands-on experiences on EDA tools, such as Cadence and Synopsys tools;
Familiar with C language;
Relevant experience in set-top box product, AHB/AXI Bus, Async design and System architecture design;
Good communication skills and good oral/written English.