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Job Description:

Participate ASIC digital verification for various PCIe IP/SoC projects;

Create PCIe verification plans with designers;

Develop DV architecture and verification environment;

Verification execution and sign-off.

Qualification:

Excellent team work style;

Production experience in PCIe Gen 3 products;

Solid IP/SoC verification background;

Mass production for verified IP/SoC;

Bachelor with 7+ years of experience in ASIC digital verification (Master with 5+ years );

Expert in System Verilog/UVM;

Expert in scripting;

Good English skills (read and write);

Skills plus:

Production experience in simulation acceleration solution;Production experience in in-circuit emulation solution;Familiar with x86 architecture;Good understanding on modern Operating systems and virtualization for PCIe.
HR Contact: hr@montage-tech.com

Job Description:

Write micro-architecture definition and design implementation Spec;

Write RTL coding for block or top level;

Do IP level synthesis/timing analysis/formality check/CDC check/Code coverage check;

Assist verification engineers to complete module and top level simulation and verification;

Debug RTL/Gate Level waveform at module or top level;

Do Silicon debugging of the related module functionalities and provide ECO solution accordingly.

Qualification:

MSEE with 2+ years of experience in digital design;

Relevant experience in high speed IO IP design, and PCIe design experience is a big plus;

Strong skills in Verilog RTL coding, simulation debug and base or metal layer ECO;

Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc.;

Strong skills in Script and be familiar with TCL, Perl, etc.;

Self-motivated, good team work spirit and good communication skills.


HR Contact: hr@montage-tech.com

Job Description:

Design, simulate and verify high speed CMOS analog and mixed-signal circuits;

Conduct high speed serial link system behavioral modeling;

Supervise layout floor plan and design of IC blocks;

Help define specifications of IC blocks and create design documentation;

Do silicon test, characterization and debugging.

Make knowledge sharing/presentation within design team.

Qualification:

MSEE or above with minimum 3 years of working experience;

Strong experience in DFE (Decision Feedback Equalizer) or CDR (Clock Data Recovery) circuit design;

Experience in DDR or other high speed designs (e.g. PCIe, HDMI, SerDes) is preferred;

Good system level knowledge on high speed serial link;

Strong lab experience in silicon debugging, good understanding on lab instruments (e.g. oscilloscope, network analyzer);

Ability to supervise layout floor plan and design;

Good understanding on deep submicron CMOS technology process and device physics;

Proficiency of EDA design tools (Virtuoso, Spectre, HSPICE, AMS, etc.);

Experiences in Verilog, Verilog-A and/or Matlab;

Good communication skill and good command of written English are highly desired.


HR Contact: hr@montage-tech.com

Job Description:

Design, evaluate and verify PLL ClockGen related circuits and the other mixed-signal analog circuits;

Oversee layout and verification activities which include floor plan, LVS and DRC.

Qualification:

Bachelor degree or master degree in ASIC design relevant;

Good fundamental in analysis and design of analog/mixed-signal circuits;

Experience in Verilog, AHDL and/or Matlab;

Ability to do layout and provide verification/debugging guidance

Solid knowledge of EDA design tools such as Analog artist, Spectre, HSPICE and NC-Verilog;

Familiar with Computer languages such as C, C++, perl is welcome.

Experience in PLL or high-speed I/O is preferred;

Good communication skills and good oral/written English.


HR Contact: hr@montage-tech.com

Job Description:

We are looking for an experienced Switch Power IC design engineer to develop a high efficiency Buck PMIC for next generation DDR application. The Job includes but not limits to below items:Buck behavior model building up, key parameters simulation, fine tune and verification; Defining specifications of blocks and creating design documentation; All function block circuit level design, simulation and verification; Supervision of layout floor plan and design of each function blocks; Silicon evaluation test, characterization and debugging; Production test development support.

Qualification:

BSEE or above with at least 2 years of experience in switch power IC development;

Experience in switch power supply behavior model building up;

Experience in Buck power IC circuit design;

Ability to supervise layout floor plan and design;

Good understanding of BCD process, model for switch power supply IC design;

Proficiency in EDA design tools (Simplis, Spectre, HSPICE, etc.);

Good Lab experience in switch power IC testing;

Good verbal and written communication and presentation skills, positive attitude;

Willing to take challenges and to solve difficult technical problems;

Quick learner.


HR Contact: hr@montage-tech.com

Job Description:

Participate ASIC digital verification for various IP/SoC projects;

Create verification plans with designers;

Develop DV architecture and verification environment;

Verification execution and sign-off;

Mass production for verified IP/SoC.

Qualification:

Excellent team working style;

Solid IP/SoC verification background;

Bachelor with 2+ years of experience in ASIC digital verification;

Production experience in verification strategies and testplans;

Familiar with System Verilog/UVM for testbench creation, debugging, reuse, constrained-random stimulus and functional coverage;

Production experiences in ARM buses, such as AXI/AMBA/APB is a plus;

Familiar with verification tools;

Familiar with Linux, csh/Python or any script languages;

Good English reading and writing skills;

Skills plus:

Production experience in simulation acceleration solution;Production experience in in-circuit emulation solution;Familiar with x86 architecture, especially PCI Express;Familiar with any RISC architecture (ARM, MIPS, etc.);Familiar with system modeling;Good understanding on modern operating systems and virtualization.

HR Contact: hr@montage-tech.com

Job Description:

Work on board level chip function verification and performance test;

Do chip validation and test together with design team;

Develop and merge the auto-test for chip test interface in server/bench;

Analyze bug of our product and failure of customer return.

Qualification:

BSEE with minimum 2 years of experience in high-speed interface test;

Familiar with PCI/PCIE, USB, SAS/SATA, I2C/SMBUS, IPMI, BIOS/EFI and DIMM, etc;

Experience in IC debug or system level failure analysis;

Familiar with lab equipment, such as oscilloscope, logic analyzer, BERT, etc;

Experience in C language, familiar with Python programming is a plus;

Good communication skill, team work spirit, self-motivated;

Quick learner.


HR Contact: hr@montage-tech.com

Job Description:

Generate sub-module design specification from prototype architecture;

Design high-speed (>500MHz) circuit, including RTL coding, IP using, simulation, timing closure and bit file generation;

Perform porting ASIC to FPGA, generate/run/debug test cases on FPGA;

Write Design report;

Build up and maintain FPGA test platforms, including PCB schematic design and layout support.

Qualification:

BSEE with 3 years of experience in circuit design with FPGA;

More experience in IP using/debugging, such as PLL, MCU, PCIe and DDR4 interface;

Knowledge in DDR4 memory system and Intel server platform;

Familiar with lab equipment, such as oscilloscope and logic analyzer;

Familiar with PLD/FPGA design flow using Verilog and EDA tools such as Xilinx ISE and Altera Quartus;

Knowledge in TPM, encryption IP etc. is a plus.


HR Contact: hr@montage-tech.com

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