The M88DS3103 is an advanced single-chip demodulator for digital satellite television broadcasting system. It is fully compliant with the DVB-S2/S standard and can support QPSK, 8PSK, 16APSK and 32APSK demodulation schemes. The chip provides a fast, easy-to-apply and cost-effective solution for digital satellite receiver front-end design.
The M88DS3103 accepts baseband differential or single-ended I and Q signals from a tuner, then digitizes, demodulates and decodes the signals, and finally outputs an MPEG transport stream. The M88DS3103 supports symbol rates from 1 Msps to 45 Msps, and code rates from 1/4 to 9/10. Its features cover blind scan, fade detection, timing and carrier recovery, performance monitoring, co-channel interference cancellation, command interface, and DiSEqC™ 2.X interface, etc. The device is controlled via a serial 2-wire bus.
The M88DS3103 works properly with 1.2 V and 3.3 V voltage supplies. It is available in a 48-pin QFN package and is RoHS compliant.